Intel 2Q26 Earnings: The Second-Source Moment
The CPU recovery is funding Intel’s comeback. The larger opportunity is becoming the alternative manufacturing platform AI customers increasingly need.
TL; DR
Intel’s CPU engine is working again. DCAI revenue rose 59%, operating margin approached 40%, and better yields turned additional factory output into unusually strong profit growth.
TSMC’s capacity discipline is creating demand for alternatives. Customers do not need Intel to surpass TSMC; they need a credible second source that reduces concentration and secures capacity.
Technology proof is no longer enough. 18A, 14A and EMIB-T show meaningful progress, but major external contracts will determine whether Intel has built a real foundry business—or merely a better internal manufacturing system.
From Intel CFO David Zinsner’s prepared remarks on the second quarter earnings call:
Q2 revenue of $16.1 billion was up 19% sequentially and 25% year on year, exceeding the top end of our guided range. This was $1.8 billion above the midpoint of our guide, driven by strength across the board... Despite exceeding our expectations for wafer outs in the quarter, strengthening demand continues to outstrip our growing supply.
Intel’s quarter was plainly excellent: non-GAAP EPS was $0.42, DCAI revenue rose 59%, and the segment’s operating margin reached almost 40%. The real surprise, though, was not demand. Intel already knew customers wanted more server CPUs. The surprise was that its factories produced far more usable output than management expected, customers absorbed all of it, and supply remained tight.
My read is that Intel now has two distinct theses. The near-term thesis is a CPU recovery: AI infrastructure demand, higher core counts, pricing and improving yields are generating earnings and loading the fabs. The long-term thesis is a second-source opportunity: TSMC’s cautious capacity expansion, customer efforts to diversify, and the collapse of the old boundaries between compute, memory and packaging may create a place for another integrated manufacturing system.
Eighteen-A and 14A show whether Intel can build that system. External contracts will show whether anyone else wants to use it.
The CPU Buys Time
The most revealing number was not DCAI revenue. It was DCAI operating profit.
Sources: Intel earnings materials and the prior Q1 analysis.
Intel added roughly $1.2 billion of sequential DCAI revenue and nearly $1 billion of segment profit. That sort of fall-through will not repeat every quarter, but it shows what drove this one: more units, higher core counts, richer mix, pricing and manufacturing improvement.
Agentic AI belongs in this discussion, but not as a made-up revenue bridge. Intel cannot tell us how much of the 59% growth came from agents, and neither can I. Today’s drivers were hyperscaler construction, enterprise demand, scarcity and better factory output. The agentic thesis explains why CPU demand may remain stronger for longer.
What makes that thesis more credible is that TSMC is now making the same argument. C.C. Wei described AI moving from “query mode” to “command and action mode,” driving another step-up in token consumption and compute. He also acknowledged that CPUs are becoming more important in AI data centres, even though TSMC cannot yet separate AI-related server CPUs in its reporting.
That is the right distinction: agentic demand is visible in system architecture before it is visible in segment accounting.
For Intel, CPU demand does more than increase revenue. It trains the factories. Eighteen-A output rose more than 50% sequentially and came in around 25% above target. The cost of the primary Panther Lake SKU fell roughly 50% year-to-date, with another 20% reduction targeted this year. Better yields and shorter cycle times also helped narrow the Foundry loss.
The loop is straightforward:
Intel spent a decade running that loop backwards. Late processes weakened products; weaker products reduced utilisation; low utilisation made the fabs more expensive. Q2 was the clearest evidence yet that integration can transmit improvement again.
But CPUs are still the funding mechanism, not the final destination.
The TSMC Brake Creates a Market
For years, using TSMC was the low-risk choice. It had the best process, the deepest production knowledge and the best record of bringing difficult chips to volume. Moving a flagship design to Intel or Samsung meant porting expense, schedule risk and the possibility of an ugly yield surprise.
That calculation changes when TSMC capacity itself becomes uncertain.
TSMC’s capital spending was broadly flat after its 2021 jump and declined in 2023 and 2024, just as hyperscaler AI spending accelerated. TSMC is now raising 2026 capex toward $52–56 billion and adding N3 capacity in Taiwan, Arizona and Japan, but much of that production arrives in 2027–28. Wei has been candid about the reason for caution: committing tens of billions today against uncertain demand several years out can become “a big disaster” if the cycle breaks.
TSMC is behaving rationally. The risk does not disappear; it moves to customers.
A hyperscaler unable to obtain enough silicon delays services and forgoes revenue. The old choice was certain TSMC execution versus uncertain second-source execution. The new choice is TSMC execution with uncertain capacity versus a less proven supplier that can reserve capacity.
That is why customer behaviour beyond TSMC matters. Tesla has disclosed a “landmark” Samsung deal to facilitate future chip production, while Samsung and AMD signed an MOU to expand collaboration across next-generation AI memory and computing. These are not equal forms of proof—a production arrangement matters more than an exploratory MOU—but they show customers widening their manufacturing and technology options.
Intel does not need customers to conclude it is better than TSMC. It needs them to conclude that dependence on TSMC alone is more dangerous than helping Intel become viable.
That is a much lower bar. It is also a real market.
When Capacity Is Not Enough
If the problem were merely a shortage of leading-edge wafers, Intel’s opportunity would be a conventional second-source story.
AI is creating a harder problem. Power has crossed conventional cooling capacity; HBM bandwidth is straining standard interfaces; and accelerator packages are outgrowing the geometry of traditional interposers. These constraints interact: adding memory enlarges the package, more routing raises power, and more power forces cooling changes that affect the chip and package design. The bottleneck is moving from the individual component to the boundary between components.
This is why customers may need more than spare wafers. They may need another integrated path across process technology, custom silicon, packaging, power delivery and high-volume manufacturing.
Intel has relevant pieces: x86 CPUs, purpose-built silicon, networking IP, EMIB-T, 18A, 14A and a large US factory network. The purpose-built silicon business nearly tripled year over year and is approaching a $2 billion annual run rate; management sees a route to $4 billion. EMIB-T has a growing backlog and is aimed at customer ramps in 2027.
That does not mean Intel controls the system. Nvidia still defines much of the high-end AI architecture. TSMC owns the deepest external manufacturing and packaging learning loop. Intel has breadth, but breadth can be either an advantage or an expensive collection of businesses.
The realistic pitch is not “we are better than TSMC.” It is “use us where dependence on one process and packaging platform has become too concentrated.” A second platform with adequate performance and guaranteed allocation can be more valuable than waiting in TSMC’s queue. Yet EMIB-T remains option value until Intel proves volume yields; the warpage observed on its large panel test vehicle goes directly to the company’s historic weakness in turning technical demonstrations into reliable manufacturing.
This is the structural opening: TSMC’s restraint creates demand for alternatives at the same time the three walls increase the value of an integrated alternative.
Now Intel must earn it.
Process Proof, Customer Proof
Intel’s disclosures were precise where the evidence was strongest and vague where it was weakest.
Sources: Intel earnings release and call.
On 18A, management gave output, yield and cost figures. On 14A, it gave PDK timing, risk-production dates and a high-volume ramp target. When Bank of America’s Vivek Arya asked when customer enthusiasm would become announcements, management returned to those process milestones. When Melius’s Ben Reitzes asked whether higher capex reflected hard external orders, the answer broadened to confidence across Intel’s businesses.
This is not necessarily evasion; foundry agreements can remain confidential for years. It does tell us where the burden of proof sits.
Eighteen-A and 14A are evidence that Intel may possess competitive technology. A signed, high-volume external customer is evidence that Intel has a foundry product.
The distinction matters because Intel is spending ahead of that proof. The company now expects more than $20 billion of 2026 capex and materially more in 2027. CPU demand makes the near-term investment rational. The long-term return requires outside volume, packaging economics and customer commitments that prevent Intel from carrying the entire risk itself.
Intel therefore has two clocks.
The CPU clock is running quickly: demand, earnings, yields and internal utilisation are improving.
The second-source clock has barely started: the industry opening is clearer, but Intel has not yet shown that major customers will design around 14A or trust EMIB-T at volume.
The CPU keeps Intel in the race.
TSMC’s brake and the three walls create the opening.
External contracts will decide whether the opening belongs to Intel.
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